Frequency divider with dual or octal or decimal or hexadecimal divisor input

摘要

The frequency divider divides pulses within a period by a non whole number dual, octal, decimal or hexadecimal number and outputs a number of pulses corresponding to the count system. The divisor input is programmable and becomes dual, octal, decimal or hexadecimal. Each low value is rounded up or rounded off to respective higher value points in the non-whole number range until a conversion to a whole number division is carried out up to the lowest value point. Preferably at the end of a division period the result is provided without any rounding error. The divisors are preferably selected according to requirements depending on the non-whole number component to provide that the deviation of the output frequency or its average value is reduced to a minimum during a period.