| 摘要 |
<p>A memory device has an array of memory cells which are positioned in a first block and a second block. The memory cells are arranged in rows and columns. A plurality of bit lines is coupled to the memory cells and a plurality of word lines is coupled to the memory cells. A sense amplifier is positioned between the first block and the second block, and a plurality of electrical connections is made between the sense amplifier and the bit lines. A plurality of isolation transistors is electrically connected in series with the electrical connections, the isolation transistors being located within the first and second blocks and spaced from the sense amplifier block.</p> |
