发明名称 Circuit structure and system configuration for implementing pseudo four-point interpolation
摘要 The present invention discloses a data processing module for generating an interpolated output from four sampled input data. The data processing module includes an input means, i.e., a memory module, for receiving the four sampled input data. The data processing module further includes a pseudo four-point interpolation (PFPI) module for receiving a ratio value p and for generating the interpolated output by utilizing a novel pseudo four-point interpolation algorithm as represented by an Equation (6).
申请公布号 US5636339(A) 申请公布日期 1997.06.03
申请号 US19940209969 申请日期 1994.03.14
申请人 INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE 发明人 HUANG, GWO-SHENG;ZHAOG, YEE-LU
分类号 G06T3/40;(IPC1-7):G06T1/00 主分类号 G06T3/40
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