| 摘要 |
A microprocessor controlled apparatus includes a microprocessor (2) with e.g. eight address lines (A,0,A1 . . . A7) on which signals may be applied by the microprocessor for selectively addressing a peripheral device coupled thereto, and a data device such as a LCD module (1) having data lines to which data signals may be applied for transfer into the data device. Four of the data lines (D0,D1,D2,D3) are coupled to a sub-set of the microprocessor address lines (A2,A3,A4,A5) excluding the two address lines (A0,A1) associated with the least significant bits. The signals on the sub-set of address lines are thus applied as data signals to the data device. When data is to be transmitted to the data device the microprocessor (2) is caused to execute a sub-routine comprising instructions having addresses such that the signal appearing on the sub-set of address lines remains substantially stable over an extended period of time allowing data to be clocked into the device even when the write timing of the microprocessor is too fast for the device to accept data directly from the data output lines of the microprocessor.
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