发明名称 Insertion of redundant vias in an integrated circuit
摘要 <p>A wiring design tool which detects minimum area vias and replaces them with redundant vias pairs. The invention uses the definitions for single vias and tracks in a grid coordinate system and a file describing the design wires and their interconnections to select the most favorable direction for the placement. The invention accomplishes this by examining the directions one track away from each single via at various levels and according to the methodology of this invention, detects a possible situs for a redundant via pair, preferably where a segment of wire on the same net already exists. If no design rule violation occurs the system replaces the single via with a redundant via pair.</p>
申请公布号 IL121490(D0) 申请公布日期 1998.02.08
申请号 IL19970121490 申请日期 1997.08.07
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人
分类号 G06F17/50;(IPC1-7):H01L 主分类号 G06F17/50
代理机构 代理人
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