| 摘要 |
<p>PROBLEM TO BE SOLVED: To prevent the generation of a problem due to an excessive write operation and an excessive erase operation by a method wherein a memory transistor comprising a floating gate electrode and a MOS-strucutre selection transistor are connected in parallel and the memory transistor and the selection transistor own a gate electrode in common. SOLUTION: Memory transistors MC11 to MC1n, MC21 to MC2n, MC31 to MC3n and first selection transistors CG11 to CG1n, CG21 to CG2n, CG31 to CG3n form respective pairs so as to be connected in parallel, and tier pairs are connected in series. In addition, one each out of second selection transistors SG11, SG21, SG22, SG31, SG32 are connected in series with sides of bit lines Y1, Y2, Y3 and with the side of a source line S in their series connected bodies, and one group is constituted. Gate electrodes of the memory transistors are used also as gate electrodes of the first selection transistors.</p> |
