发明名称 LOW-CAPACITANCE CHIP VARISTOR AND ITS MANUFACTURE
摘要 <p>PROBLEM TO BE SOLVED: To constitute a low-capacitance chip varistor, by reducing the thickness of a varistor layer by using a printing method, and forming substrates which have such strengths and thicknesses that can remedy the strength of the varistor layer and low dielectric constants and do not give any influence on the characteristics of the varistor layer on one surface of the varistor layer. SOLUTION: A varistor layer 11 is formed by alternately piling a plurality of varistor coating layers 17 and each internal electrode 14, 15, and 16 upon another by using a printing method. Then, a laminated body is formed by putting the varistor layer 11 between ceramic substrates 12 and 12a so that the outer peripheral edge section of the layer 11 may be exposed on the four side faces of the laminated body. The substrates 12 and 12a have low dielectric constants and strengths and thicknesses sufficient to protect the layer 11 from external shocks. The one terminals of the internal electrodes 14 and 16 and 15 are respectively connected to external electrodes 13 and 13a. Therefore, a low-capacitance varistor is obtained by lowering the capacitance of a chip varistor.</p>
申请公布号 JPH113809(A) 申请公布日期 1999.01.06
申请号 JP19980092831 申请日期 1998.03.20
申请人 CERATEC CO LTD 发明人 AN HEISHUN;KIN RYUCHU
分类号 H01C7/12;H01C10/00;(IPC1-7):H01C7/12 主分类号 H01C7/12
代理机构 代理人
主权项
地址