| 摘要 |
<p>PROBLEM TO BE SOLVED: To obtain an equivalent expected value without setting a defective memory as a fault component by incorporating a read only memory of a memory cell structure in which a plurality of transistors including selecting transistors are connected in series, and turning off all selecting transistors in the case of reading all expected values of memory cells as high voltage state. SOLUTION: In the case of reading data from right third column of memory transistor 73, a digit line 22 is set to High, first selecting word line 2 is set to High, second selecting word line 3 is set to Low, third selecting word line 6 is set to Low, first word line 4, second word line 5 and fourth to sixteenth word lines 7 to 19 are set to High. As a result, even when data storage MOS transistor 73 has a fault, output data remains High. Thus, even if the memory cells in which storage transistors of sixteen stages are all High has one fault, it can be normally operated for a fault to be relievable.</p> |
