发明名称 POWER SAVING FLASH A/D CONVERTER
摘要 <p>Flash analog-to-digital (A/D) conversion is performed with an n-bit converter using a resistive-divider string in which tap points are taken between each pair of adjacent resistors of the string as one input to each of a respective plurality of 2n-1 comparators. Each of the comparators has a second input in common with all of the other comparators at which an analog input voltage to be converted to digital form is applied. A transition point occurs at one of the tap points at which immediately adjacent ones of the comparators exhibit outputs of different binary states for a given sample of the analog input voltage, signifying the transition point is occurring at the highest-order digital output at which the sampled analog input voltage exceeds a reference voltage. The transition point is detected during each sample, at a location within a group of consecutive ones of the comparators of preselected number considerably less than the total number of comparators in the converter. All of the comparators in the converter except those in the group containing the transition point are deactivated to conserve power during the conversion process for the given sample.</p>
申请公布号 WO1999021284(A1) 申请公布日期 1999.04.29
申请号 US1998021830 申请日期 1998.10.15
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