发明名称 Verzweigungsbefehlprozessor und Verfahren
摘要 <p>The parallelism of a multi-pipelined digital computer is enhanced by detection of branch instructions from the execution pipelines and concurrent processing of up to two of the detected instructions in parallel with the operations of the execution pipelines. Certain branch instructions, when detected, are removed altogether from the pipeline, but still processed. The processing is synchronized with the execution pipeline to, first, predict an outcome for detected branch instructions, second, test the conditions for branch instructions at their proper place in the execution sequence to determine whether the predicted outcome was correct, and third, fetch a corrected target instruction if the prediction proves wrong. <IMAGE></p>
申请公布号 DE69229198(D1) 申请公布日期 1999.06.24
申请号 DE1992629198 申请日期 1992.03.13
申请人 INTERNATIONAL BUSINESS MACHINES CORP., ARMONK, N.Y., US 发明人 BLANER, BARTHOLOMEW, NEWARK VALLEY, NEW YORK 13811, US;JEREMIAH, THOMAS LEO, ENDWELL, NEW YORK 13760, US;VASSILIADIS, STAMATIS, VESTAL, NEW YORK 13850, US;WILLIAMS, PHILLIP GENE, VESTAL, NEW YORK 13850, US
分类号 G06F9/38;(IPC1-7):G06F9/38 主分类号 G06F9/38
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