摘要 |
<p>PROBLEM TO BE SOLVED: To provide an operation control circuit of an integrated circuit memory device operating in a synchronous-type mode based on an internal clock signal. SOLUTION: An internal signal controller 89 generates an internal clock enable signal PCKE in response to a mode instruction. An internal operation clock generation part 86 generates an internal clock signal PCLK based on the internal clock enable signal PCKE and an external clock PCLKTTL. The internal signal controller 89 responds the mode instruction and generates the internal clock enable signal PCKE, thus operating an integrated circuit memory device without being restrained by input from a clock enable pin.</p> |