摘要 |
<p>PROBLEM TO BE SOLVED: To enhance the efficiency of a switch module by using a grouped and individualized port. SOLUTION: The processing unit is provided with a header conversion section 220 that generates a valid confirmation signal and a group signal GR when a header of a multiplexed cell is valid, an inactive address generating section 232 that sequentially assigns a pause address of a cell storage destination in response to the valid confirmation signal, a group information memory 218 that decides group information GROUP corresponding to the GR signal from a 1st table, an address buffer selection memory 216 that decides address buffer selection information WR corresponding to the GR signal from a 2nd table to update the information served by successive address buffer selection information NFWR, an address buffer selection information generating section 238 that decides the NFWR from information WR, GROUP, address buffers 222-232 that are enabled by the WR to store the inactive address and a common memory section 212 that stores cells from a multiplexer to the inactive address.</p> |