发明名称 VIDEO MEMORY CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide the system for efficiently addressing a synchronous DRAM (SDARM) in a video memory circuit that stores pixel data of a video supplied to a display device. SOLUTION: A memory array consists of 2-bank (0, 1)×2-block (A, B). Pixel data of a first half of odd number lines of a video image are given/received/to/from the bank A0, and pixel data of a latter half of odd number lines of the video data are given/received to/from the bank B0. Then a user can access the memory array for the pixel data of the first half and the latter half of one horizontal line simultaneously. Moreover, pixel data of adjacent odd number lines and pixel data of adjacent even number lines in the video image can simultaneously be read from the memory array.
申请公布号 JP2000232623(A) 申请公布日期 2000.08.22
申请号 JP19990031982 申请日期 1999.02.09
申请人 NEC CORP 发明人 OKUTSU KIYOUTARO
分类号 G06F3/153;G09G5/393;H04N5/907;(IPC1-7):H04N5/907 主分类号 G06F3/153
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