发明名称 CLOCK TRANSFER SYSTEM
摘要 <p>PROBLEM TO BE SOLVED: To obtain a clock transfer system with which data are read with a stable read pulse fully protected in the front and back directions at all times by controlling the read pulse. SOLUTION: This clock transfer system is provided with delay sections 15, 16 and a read pulse control section 20 and with a means controlling read pulses. The read pulse control section 20 selects a write shift pulse generated from a write pulse or a pulse from a read pulse generating section to provided front and back protection to the read pulse. Since data with a delay are written to/read from a memory 10, the pulse can be controlled before reading is disabled (read pulse are overlapped).</p>
申请公布号 JP2000269942(A) 申请公布日期 2000.09.29
申请号 JP19990071448 申请日期 1999.03.17
申请人 NEC ENG LTD 发明人 TAKAHASHI TOSHIHIRO
分类号 H04L7/00;(IPC1-7):H04L7/00 主分类号 H04L7/00
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