发明名称 PACKAGE FOR HOUSING SEMICONDUCTOR ELEMENT
摘要 PROBLEM TO BE SOLVED: To suppress the generation of a shear stress in connection terminals even in the case where a heat cycle is repeatedly applied and to enhance the reliability of the connection of a package for housing a semiconductor element with an external circuit board in the package for housing the semiconductor element of a structure, wherein the semiconductor element is flip-chip mounted on a metallized wiring layer and a high heat conductive cover body is mounted on the surface of the element. SOLUTION: For packaging a semiconductor element, the semiconductor element 2 provided with electrodes for connection is flip-chip mounted on a metallized wiring layer 3 on the surface of almost a quadrangle-shaped insulating substrate 1 formed by coating with the layer 3. A high heat conductive cover body a which is attached on the surface of the substrate 1 in such a way as to cover the element 2 and is provided with its one part bonded to the upper surface of the element 2, and a plurality of connection terminals 5 which are provide on the rear of the substrate 1 and comprise solders electrically connected with the element 2, are provided. The cover body 9 is formed into the form of almost a quadrangle, legs 11 are respectively provided on each side part of the form of almost the quadrangle, and the legs 11 are attached on the substrate 1.
申请公布号 JP2001127219(A) 申请公布日期 2001.05.11
申请号 JP19990309654 申请日期 1999.10.29
申请人 KYOCERA CORP 发明人 MAEDA KAZUTAKA
分类号 H01L23/34;(IPC1-7):H01L23/34 主分类号 H01L23/34
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