发明名称 MPEG VIDEO DECODER
摘要 <p>PROBLEM TO BE SOLVED: To provide an MPEG video decoder capable of reducing frame omissions caused in reproduced moving images and improving visibility. SOLUTION: When decided that the occupancy amount Bm of a bit buffer 2 is below a third threshold BTH3 or the bit buffer 2 causes underflow, an underflow control circuit 12 stops the read of pictures from the bit buffer 2 and successively outputs (repeats) video output which is the decoded result of not the picture processed concurrently but the picture read from the bit buffer 2 previously from a decoding core circuit 4.</p>
申请公布号 JP2001169285(A) 申请公布日期 2001.06.22
申请号 JP20000347862 申请日期 2000.11.15
申请人 SANYO ELECTRIC CO LTD 发明人 OKADA SHIGEYUKI;TANAHASHI NAOKI;NAKAJIMA ISATO
分类号 H04N5/92;G06T9/00;H04N19/00;H04N19/102;H04N19/152;H04N19/172;H04N19/196;H04N19/423;H04N19/44;(IPC1-7):H04N7/24 主分类号 H04N5/92
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