发明名称 DMA CONTROLLER
摘要 <p>PROBLEM TO BE SOLVED: To provide a DMA controller capable of grasping the use ratio of a bus or access situation by plural devices without any complicated control and controlling an operating mode for every block of a memory in accordance therewith. SOLUTION: On the basis of an address signal ADD, a bus occupancy ratio S of a bus 5 is calculated by a bus monitor part 8. Besides, the operating situations of respective DMA control parts 1-3 are detected by the bus monitor part 8. On the basis of the bus occupancy ratio S and the operating conditions of the respective DMA control parts, the operating modes of respective memory blocks 71-74 provided in a memory 7 are respectively controlled by a memory controller part 9. Namely, the memory block, which does not require high speed processing, is operated in a power down mode or self-refresh mode. Therefore, power consumption can be effectively suppressed low.</p>
申请公布号 JP2001175532(A) 申请公布日期 2001.06.29
申请号 JP19990357320 申请日期 1999.12.16
申请人 MINOLTA CO LTD 发明人 KAMEI NOBUO;MINAMI TAKESHI;MORITA KENICHI
分类号 G06F1/32;G06F12/00;G06F12/06;G06F13/28;(IPC1-7):G06F12/06 主分类号 G06F1/32
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