| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a pulse density modulation circuit with a simple configuration that can reduce the increase in the circuit scale and the throughput comparatively even when the number of bits of a received digital signal is increased. SOLUTION: A distribution circuit 1 has output terminals whose number corresponds to number of pulses within a unit time when a pulse density modulation output signal is outputted and is configured that the number of bits of the received digital signal designated for each timing of a clock signal on the basis of a predetermined pattern corresponds to each of the output terminals. Furthermore, the output terminals of the distribution circuit 1 are respectively connected to contacts 2a-1-2a-N of a switch circuit 2 and these are selected by a changeover contact 2b switched synchronously with the clock signal received from a clock input terminal 3 so that prescribed bit data of the received digital signal are sequentially outputted from the contact 2b.</p> |
