Semiconductor memory device having large data I/O width and capable of speeding up data input/output and reducing power consumption

摘要

A memory cell array is split into first and second memory blocks. A switch group splits pairs of global data I/O lines provided in common to the overall memory cell array into regions corresponding to the first and second memory blocks respectively. Column selection in a memory block far from a data input/output circuit is executed while turning off the switch group before selection of the memory blocks, and either a turn-on operation of the switch group or column selection in another memory block is executed after selection of the memory blocks is defined.