发明名称 CLOCK FREQUENCY DIVIDER
摘要 <p>PROBLEM TO BE SOLVED: To provide a clock frequency divider that generates a frequency division clock at a duty ratio with high accuracy even when a frequency division value of any integer is set. SOLUTION: An even number/odd number discrimination section 201 discriminates whether a frequency division setting value N is an even number or an odd number. When the frequency division setting value N is an even number, a frequency division value arithmetic counter 202 frequency-divides a basic clock so that duty ratios of high/low levels of the frequency division clock are both N/2, and when the frequency division setting value N is an odd number, the frequency division value arithmetic counter 202 frequency- divides the basic clock so that one duty ratio of high/low levels is (N+1)/2 and the other is (N-1)/2.</p>
申请公布号 JP2001292058(A) 申请公布日期 2001.10.19
申请号 JP20000108399 申请日期 2000.04.10
申请人 RICOH CO LTD 发明人 OKUBO HIROKI
分类号 G06F1/08;H03K21/00;H03K23/64;(IPC1-7):H03K21/00 主分类号 G06F1/08
代理机构 代理人
主权项
地址