发明名称 Receiver
摘要 Detection output from a detection circuit 17 is converted to digital detection data Dl and supplied to an AGC circuit AGCC and a noise clamping circuit NCC that are formed by digital circuits. In the AGC circuit AGCC, a digital low pass filter 19 generates DC voltage data D2 from the detection data D1. A digital divider 20 performs division of the DC voltage data D2 by the reference detection level data D3 indicating the detection data level. A digital multiplier multiplies the division results D4 by the detection data D1 to generate multiplication data D5 that is constant irrespective of a variation in the detection data D1. In the noise clamping circuit NCC, a digital comparator 23 compares the size of the preset voltage data D6 and that of the multiplication data D5. A selector circuit 24 selectively outputs preset voltage data D6 or multiplication data D5 to generate signal wave data DAF.
申请公布号 US2002016159(A1) 申请公布日期 2002.02.07
申请号 US20010900133 申请日期 2001.07.09
申请人 PIONEER CORPORATION 发明人 OHASHI TORU
分类号 H03G3/20;H03G3/30;H03G11/00;H04B1/10;H04B1/16;H04L27/06;(IPC1-7):H04B1/06 主分类号 H03G3/20
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