AUTOMATIC PRECHARGE CONTROL CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: An automatic precharge control circuit of a semiconductor memory device is provided, which reduces a time required in precharging a corresponding column, after a precharge command is applied from the external. CONSTITUTION: A column active signal generation part(60) generates a column active signal(PRB) to activate a corresponding column a logic operation of a RAS signal(/RAS), a CAS signal(/CAS), a write enable signal(/WE) and a bank selection signal(BANK). A delay signal generation part(62) generates a delay signal(PRD) by delaying and inverting a low column active signal(PRB). An auto precharge signal generation part(68) generates an auto precharge signal(PAPB) using an internal precharge command signal(CA10) and an internal bank selection signal(PBANK). A column address reset signal generation part(64) generates a column address reset signal(PDRAPB) controlling a reset of an internal address decoder(70) by logic operation of the delay signal and the auto precharge signal. And a bit line sensing determination part(66) generates a control signal(PXRB) controlling the enable/disable of a bit line.