发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE: A semiconductor integrated circuit is provided to effectively improve the gate delay time even if the threshold voltage of a transistor is decreased in conjunction with a decreased in the power supply potential as well as to effectively decrease the stand-by current even if the threshold voltage of a transistor is decreased in conjunction with a decreased in the power supply potential. CONSTITUTION: A semiconductor integrated circuit includes a drive circuit(100), a drive circuit(310), and a logic circuit(350). Drive circuit(100) drives a signal line(340). The signal line(340) is used for block selection in a semiconductor memory. The signal line(340) is connected as an input to a plurality of logic circuits such as the logic circuit(350) in a column direction. Drive circuit(310) drives a signal line(320). The signal line(320) is a main word line in a semiconductor memory. The signal line(320) is connected as an input to a plurality of logic circuits such as the logic circuit(350) in a row direction. The IGFET receives the signal line(340) at a gate terminal and provides a controllable impedance path between the signal line(320) and a node ND. The logic circuit includes a stand-by mode in which the IGFET 352 receives a potential at a source electrode that is approximately equal to the potential at a drain electrode, thereby reducing a leakage current.
申请公布号 KR20020027282(A) 申请公布日期 2002.04.13
申请号 KR20010061528 申请日期 2001.10.05
申请人 NEC CORPORATION 发明人 NAKAGAWA ATSUSHI;TAKAHASHI HIROYUKI
分类号 G11C11/418;G11C8/08;G11C8/10;G11C11/407;H03K19/0175;H03M7/00;(IPC1-7):G11C11/407 主分类号 G11C11/418
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