发明名称 |
NON-VOLATILE SEMICONDUCTOR MEMORY |
摘要 |
<p>PROBLEM TO BE SOLVED: To improve convergency and to perform high speed erasure in erasure operation of a non-volatile semiconductor memory. SOLUTION: A word latch circuit is provided for each word line, and threshold value control is performed for each word line in a selection block. The latch circuit shares plural word lines, and occupancy area is reduced. Rewriting voltage is set individually to a completed non-volatile memory, stored in a boot region of the non-volatile memory, and recognizing anew is performed for each a supplying of a power source.</p> |
申请公布号 |
JP2002150785(A) |
申请公布日期 |
2002.05.24 |
申请号 |
JP20000345455 |
申请日期 |
2000.11.08 |
申请人 |
HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD |
发明人 |
MATSUZAKI NOZOMI;SHIBA KAZUYOSHI;TANIGUCHI YASUHIRO;TANAKA TOSHIHIRO;SHINAGAWA YUTAKA |
分类号 |
G11C16/06;G11C8/08;G11C16/02;G11C16/12;G11C16/34;(IPC1-7):G11C16/06 |
主分类号 |
G11C16/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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