ROW DECODING CIRCUIT OF NOR TYPE FLASH MEMORY DEVICE

摘要

PURPOSE: A row decoding circuit of a NOR type flash memory device is provided, which reduces an occupied layout area by embodying a local decoder using a depletion mode transistor. CONSTITUTION: The memory device includes a global word line decoder circuit(120), the first and the second local decoder circuits(140a,140b) and the first and the second sector selection circuits(160a,160b). Global word lines(GWL0-GWLn) are connected to the global word line decoder circuit. The first and the second local decoder circuits correspond to sectors(100a,100b) respectively, and the first and the second sector selection circuits correspond to the first and the second local decoder circuit respectively. The first and the second local decoder circuit include a plurality of depletion mode NMOS transistors(M0-Mn), and each transistor corresponds to the local word lines of a corresponding sector. The NMOS transistors of the first local decoder circuit have gates connected to a selection signal or a control signal(SWSa) supplied from the first sector selection circuit, and the NMOS transistors of the second local decoder circuit have gates connected to a selection signal or a control signal from the second sector selection circuit.