发明名称
摘要 The invention relates to a data processing device (100) and to a method for operating a data processing device, notably a chip card. The device comprises an integrated circuit (10) which in accordance with a first clock pulse carries out useful calculations, notably cryptographic operations. To this end a second clock pulse is randomly derived from the first clock pulse and supplied to the integrated circuit (10) instead of the first clock pulse. Distances between the edges of the second clock pulse vary randomly over time. To this end the invention provides for a clock control unit (14) which is linked to the integrated circuit (10) as well as for a random generator (12) which is connected to the clock pulse control unit (14). The clock control unit (14) is configured such that it generates a second clock (20) in accordance with the random generator (12) and the first clock pulse (18), and the second clock pulse varies randomly and controls the integrated circuit (10).
申请公布号 JP2002526840(A) 申请公布日期 2002.08.20
申请号 JP20000572793 申请日期 1999.09.21
申请人 发明人
分类号 G06F1/04;G06F21/00;G06K19/073;G09C1/00;H04L9/06;(IPC1-7):G06F1/04 主分类号 G06F1/04
代理机构 代理人
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