| 摘要 |
PURPOSE: A semiconductor chip package and a method for fabricating the same are provided to project a connection terminal to a bottom face of a main body of a semiconductor chip package by using a conductive support plate as a stiffener without using an additional lead frame and performing a half etching process of the lead frame. CONSTITUTION: A dielectric resist layer(51) is formed by coating a dielectric resist on a conductive support plate. A pattern forming film is adhered on an upper portion of the dielectric resist layer(51). An ultraviolet ray is irradiated thereon and an unhardened part is developed by using a sodium carbonate solution. A photoresist or a temporary solder resist or ink is applied on a base side of the conductive support plate. A metal layer is formed on an exposed part of the conductive support plate. A plated layer(53), an intermediate layer(54), and a wire bonding plated layer are sequentially formed on an upper portion of the metal layer. A non-active side of a semiconductor chip(57) is fixed by using an epoxy adhesive(56). An electrode terminal(57a) of the semiconductor chip(57) is connected with the plated layer by using a bonding wire(58). A package body(59) is formed by encapsulating the remaining dielectric resist layer(51), the semiconductor chip(57), the bonding wire(58), and the electrode terminal(57a). The conductive support plate and the metal layer are removed by using a ferric chloride etching solution. A ball hole is formed by etching the metal layer. A conductive ball(61) is adhered on the ball hole. |
