IMAGE PROCESSOR AND MAIN BODY SYSTEM MOUNTED WITH THE SAME

摘要

PROBLEM TO BE SOLVED: To provide an image processor capable of making communication to be matched with a main body side CPU even though there is difference between the transfer rate of image data and the operation clock of the main body side CPU. SOLUTION: A clock CPU- CLK for data input and output of the main body side CPU is given to an image processing chip 10 as well as an image synchronous clock VCLK, and both the clocks are inputted to a multiplexer 15. The multiplexer alternatively selects one between the two input signals according to a switch signal CLOCK- SEL given from the outside and inputs the selected input signal as a system clock SCLK to communicate with the outside to an external interface part 11. An image synchronizing signal VCLK is also given to an image processing part 12 and functions as a system clock in the image processing chip.