发明名称 INFORMATION PROCESSING EQUIPMENT, MEMORY MANAGEMENT UNIT, ADDRESS TRANSLATION DEVICE
摘要 PROBLEM TO BE SOLVED: To lower power consumption increasingly. SOLUTION: A carry signal output circuit 5, when a logical address is newly written into an address counter 2 in an initialized state, and when carrying-over from a lower part to an upper part of the logical addresses occurs, outputs a carry signal. When the carry signal is outputted, a MMU(memory management unit) 6 reads, from the address counter 2, the upper part of the logical addresses to translate it into an upper part of the physical addresses. The translated upper part of the physical addresses is held in a translated value register 8 and is sent to a selection circuit 7. The selection circuit 7 selects the upper part of the physical addresses outputted from the MMU 6 according to the carry signal and outputs the upper part. Meanwhile, when the carry signal is not outputted, the MMU 6 does not operate. The selection circuit 7 selects the upper part of the physical addresses held in the translated value register 8 to output the upper part.
申请公布号 JP2002358236(A) 申请公布日期 2002.12.13
申请号 JP20010164957 申请日期 2001.05.31
申请人 MITSUBISHI ELECTRIC CORP 发明人 KAMEMARU TOSHIHISA
分类号 G06F12/08;G06F9/34;G06F12/00;G06F12/02;G06F12/10;(IPC1-7):G06F12/08 主分类号 G06F12/08
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