发明名称 Digital signal processing device, DV decoder, recording device using DV decoder, and signal processing method
摘要 The invention uses: a clock signal generator for generating a clock signal asynchronized with an input signal; a frequency dividing unit for frequency dividing the clock signal outputted from the clock signal generator and outputting a predetermined clock enable signal; a digital interface processor for separating and outputting a compressed video image, audio information, and the like from a compressed digital signal in response to the clock enable signal outputted from the frequency dividing unit; a video processing unit for decoding the compressed video information outputted from the digital interface processor, obtaining a video signal, and synchronizing it with the input signal; and an audio processing unit for decoding the audio information outputted from the digital interface processor, obtaining a audio signal, and outputting the audio signal at synchronous timing according to an audio operating mode.
申请公布号 US2003035064(A1) 申请公布日期 2003.02.20
申请号 US20020076143 申请日期 2002.02.15
申请人 TORIKOSHI SHINOBU;ONO KOICHI;KURODA YOSHIAKI;NAGAZATO KATSUMI;HOSONO ATSUSHI 发明人 TORIKOSHI SHINOBU;ONO KOICHI;KURODA YOSHIAKI;NAGAZATO KATSUMI;HOSONO ATSUSHI
分类号 H04N5/04;H04J3/00;H04N5/92;H04N7/26;H04N7/52;(IPC1-7):H04N9/475 主分类号 H04N5/04
代理机构 代理人
主权项
地址