| 摘要 |
<p>PROBLEM TO BE SOLVED: To obtain a sampling circuit which can stably correct a shift of a sampling timing generated when sampling frequencies on a transmitter side and a receiver side are different without increasing a circuit scale, and further can follow a temporal fluctuation of the shift of the sampling timing also. SOLUTION: This sampling circuit is constituted by a clock shift detection circuit 4 for detecting a shift of a sampling timing generated when sampling frequencies on a transmitter side and a receiver side are different, a clock shift interpolation filter 2 for interpolating so as to remove the shift of the sampling timing based on the detection results, and a delay device 3 for performing an insertion and thinning process of the interpolation process results based on a control signal to correct the shift of the sampling timing.</p> |
