发明名称 PLL CIRCUIT AND SIGNAL PROCESSING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a PLL circuit capable of accurately matching the phase by pulling in the frequency in a short time. SOLUTION: The PLL circuit comprises a voltage-controlled oscillator VOC, and a phase detector for detecting the phase error of an input signal, thereby controlling the oscillation of the VCO based on the output of the phase detector. In this PLL circuit, as the clocks output from the VCO (105), a plurality of clocks having different phases from each other are formed, and the clock of the phase closest to the phase point detected by a phase comparator (103) is selected and is outputted. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003179488(A) 申请公布日期 2003.06.27
申请号 JP20010378021 申请日期 2001.12.12
申请人 HITACHI LTD 发明人 MATSUURA TATSUJI;TOYODA KENJI
分类号 H03L7/10;(IPC1-7):H03L7/10 主分类号 H03L7/10
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