| 摘要 |
A latch circuit is configured so that even if a power-on-reset circuit is not operated in putting a power supply to work, a depletion type MIS transistor is connected as a pull-down element to an output terminal of an RS latch to thereby reliably activate the RS latch in a reset state, whereby a circuit or a semiconductor integrated circuit device is prevented from being unintendedly operated. Furthermore, channel impurities of the depletion type MIS transistor are introduced into only a part, whereby it is possible to realize a semiconductor integrated circuit device which is excellent in safety and which is readily operated with less current consumption and with low cost.
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