发明名称 ASYNCHRONOUS DATA COMMUNICATION APPARATUS
摘要 <p><P>PROBLEM TO BE SOLVED: To maintain a stable receiving operation without generating slip of data for over 24 hours and 365 days. <P>SOLUTION: A clock frequency of a read timing of a reception buffer 6 by setting an interval for circulating an address of the reception buffer 6 as equivalent, inserting and drawing out the prescribed number of pulses by very circulation of the address of the reception buffer 6 is varied. Thus, the clock frequency of the read timing is controlled so that a writing position and a reading position to the reception buffer 6 constantly hold fixed intervals. <P>COPYRIGHT: (C)2004,JPO</p>
申请公布号 JP2003348060(A) 申请公布日期 2003.12.05
申请号 JP20020154177 申请日期 2002.05.28
申请人 ANRITSU CORP 发明人 YAMAGUCHI MICHIO;IKURI KENJI;OTA YOSHIAKI
分类号 H04L13/08;H04L7/00;(IPC1-7):H04L7/00 主分类号 H04L13/08
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