发明名称 METHOD FOR FORMING INTERLAYER DIELECTRIC IN SEMICONDUCTOR FABRICATION PROCESS
摘要 PURPOSE: A method for forming an interlayer dielectric in a semiconductor fabrication process is provided to minimize the process error by burying narrow gaps between patterns without a void. CONSTITUTION: A structure is formed on a semiconductor substrate(100). A compensation layer(110) for compensating oxygen and moisture is formed on an entire surface of the semiconductor substrate(100) including the structure. A floating oxide layer is formed by coating the floating oxide material to bury the structure of the semiconductor substrate(100). The floating oxide layer is changed to a silicon oxide layer(114) by permeating the oxygen into the floating oxide layer to react the oxygen with the floating oxide layer. The floating oxide material includes is formed with an SOG solution as a mixture of polysiloxane or polysilazane and an organic solvent.
申请公布号 KR20040013776(A) 申请公布日期 2004.02.14
申请号 KR20020046845 申请日期 2002.08.08
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 HONG, EUN GI;KIM, JU WAN;LEE, JU BEOM
分类号 H01L21/31;(IPC1-7):H01L21/31 主分类号 H01L21/31
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