发明名称 |
Process for converting programs in high-level programming languages to a unified executable for hybrid computing platforms |
摘要 |
A system and method for compiling computer code written to conform to a high-level language standard to generate a unified executable containing the hardware logic for a reconfigurable processor, the instructions for a traditional processor (instruction processor), and the associated support code for managing execution on a hybrid hardware platform. Explicit knowledge of writing hardware-level design code is not required since the problem can be represented in a high-level language syntax. A top-level driver invokes a standard-conforming compiler that provides syntactic and semantic analysis. The driver invokes a compilation phase that translates the CFG representation being generated into a hybrid controlflow-dataflow graph representation representing optimized pipelined logic which may be processed into a hardware description representation. The driver invokes a hardware description language (HDL) compiler to produce a netlist file that can be used to start the place-and-route compilation needed to produce a bitstream for the reconfigurable computer. The programming environment then provides support for taking the output from the compilation driver and combining all the necessary components together to produce a unified executable capable of running on both the instruction processor and reconfigurable processor.
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申请公布号 |
US2004088685(A1) |
申请公布日期 |
2004.05.06 |
申请号 |
US20020285299 |
申请日期 |
2002.10.31 |
申请人 |
POZNANOVIC DANIEL;HAMMES JEFFREY;KRAUSE LISA;STEIDEL JON;BARKER DAVID;BROOKS JEFFREY PAUL |
发明人 |
POZNANOVIC DANIEL;HAMMES JEFFREY;KRAUSE LISA;STEIDEL JON;BARKER DAVID;BROOKS JEFFREY PAUL |
分类号 |
G06F9/45;G06F17/50;(IPC1-7):G06F9/45;G06F9/44 |
主分类号 |
G06F9/45 |
代理机构 |
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代理人 |
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