发明名称 METHOD FOR FORMING LANDING PLUG OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a landing plug of a semiconductor device is provided to be capable of securing low resistance enough. CONSTITUTION: An interlayer dielectric(27) is formed on a semiconductor substrate(20), wherein the semiconductor substrate is completed with a predetermined process. A contact hole is formed by selectively etching the interlayer dielectric for partially exposing the semiconductor substrate. The first conductive layer(29) made of silicon is selectively formed on the exposed semiconductor substrate through the contact hole as much as a predetermined thickness. The second conductive layer(30) is formed on the entire surface of the resultant structure for filling the contact hole. A landing plug(300) is formed by etching the second conductive layer until the interlayer dielectric and a hard mask are exposed. Preferably, the second conductive layer is one selected from a group consisting of a WSix, TiSix, CoSix, CrSix, NiSix, TaSix, HfSix, ZrSix, FeSix, YSix, MoSix layer. Preferably, the second conductive layer is made of a W/WNx layer.
申请公布号 KR20040046359(A) 申请公布日期 2004.06.05
申请号 KR20020074275 申请日期 2002.11.27
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHO, HEUNG JAE;LIM, GWAN YONG
分类号 H01L21/768;H01L21/8234;(IPC1-7):H01L21/28 主分类号 H01L21/768
代理机构 代理人
主权项
地址
您可能感兴趣的专利