发明名称 |
Instruction memory system for multi-processor environment and disjoint tasks |
摘要 |
An instruction memory system is shared by a plurality of processors and the system utilizes an increased bandwidth to support the combined number of processors. The total instruction address space is divided into code segments according to the disjoint tasks to be performed. The instruction codes of each processor are consolidated into one copy for control instructions and duplicate copies for other disjoint tasks such as inbound requests and outbound requests that have greater processor contention. Interleaving of the memory arrays for certain disjoint tasks serves to provide a larger number of instructions for these tasks. The system utilizes arbiters to receive all disjoint tasks and to control multiplexors that send addresses to memory arrays.
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申请公布号 |
US6760743(B1) |
申请公布日期 |
2004.07.06 |
申请号 |
US20000477757 |
申请日期 |
2000.01.04 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
HEDDES MARCO C.;RINALDI MARK ANTHONY;YOUNGMAN BRIAN ALAN |
分类号 |
G06F9/00;G06F9/38;(IPC1-7):G06F9/00 |
主分类号 |
G06F9/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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