发明名称 |
Horizontal gate all around device isolation |
摘要 |
Embodiments described herein generally relate to methods and apparatus for horizontal gate all around (hGAA) isolation. A superlattice structure comprising different materials arranged in an alternatingly stacked formation may be formed on a substrate. The different materials may be silicon containing materials and one or more III/V materials. In one embodiment, at least one of the layers of the superlattice structure may be oxidized to form a buried oxide layer adjacent the substrate. |
申请公布号 |
US9460920(B1) |
申请公布日期 |
2016.10.04 |
申请号 |
US201514755099 |
申请日期 |
2015.06.30 |
申请人 |
APPLIED MATERIALS, INC. |
发明人 |
Sun Shiyu;Yoshida Naomi;Guarini Theresa Kramer;Jun Sung Won;Colombeau Benjamin;Chudzik Michael |
分类号 |
H01L21/76;H01L21/02;H01L21/762;H01L29/66 |
主分类号 |
H01L21/76 |
代理机构 |
Patterson & Sheridan, LLP |
代理人 |
Patterson & Sheridan, LLP |
主权项 |
1. A method of forming a semiconductor device, comprising:
forming a superlattice structure on a substrate, wherein the superlattice structure comprises:
a first material layer;a second material layer; anda third material layer; patterning the superlattice structure; etching the superlattice structure and the substrate; performing a liner deposition process to form a liner on the superlattice structure; performing a shallow trench isolation process to deposit an oxide material layer on the substrate; and performing an annealing process to oxidize at least one of the first material layer, the second material layer, or the third material layer to form a buried oxide layer. |
地址 |
Santa Clara CA US |