发明名称 |
Sequential activation delay line circuits and methods |
摘要 |
Delay line circuits and methods include a series of unit delay cells, a respective one of which includes an input and an output that are sequentially connected such that an output of a preceding unit delay cell is connected to an input of a succeeding unit delay cell. At least two of the unit delay cells in the series are sequentially activated in response to an activation signal. The sequential activation may be performed by a control circuit that is connected to the series of unit delay cells.
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申请公布号 |
US6815989(B2) |
申请公布日期 |
2004.11.09 |
申请号 |
US20020325766 |
申请日期 |
2002.12.19 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SEO SUNG-MIN |
分类号 |
H03K5/13;G11C11/407;H03H11/26;(IPC1-7):H03L7/06 |
主分类号 |
H03K5/13 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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