发明名称 Multi-chip semiconductor package and fabrication method thereof
摘要 A multi-chip semiconductor package and a fabrication method thereof are provided. A substrate having an upper surface and a lower surface is prepared. At least a first chip is mounted on the upper surface of the substrate. A non-conductive material is applied over predetermined area on the first chip and the upper surface of the substrate. At least a second chip is mounted on the non-conductive material, and formed with at least a suspending portion free of interference in position with the first chip, wherein the non-conductive material is dimensioned in surface area at least corresponding to the second chip, so as to allow the suspending portion to be supported on the non-conductive material. With the second chip being completely supported on the non-conductive material without causing a conventional chip-crack problem, structural intactness and reliability can be effectively assured for fabricated-package products.
申请公布号 US6825064(B2) 申请公布日期 2004.11.30
申请号 US20020261796 申请日期 2002.09.30
申请人 ULTRATERA CORPORATION 发明人 TSAI SHIANN-TSONG;HSU YU-MING;WU WEN-LUNG;CHEN KUEN-HUANG;SU WEN-SHENG;LIN CHIN-HSING
分类号 H01L21/44;H01L21/50;H01L21/98;H01L25/065;H01L29/768;(IPC1-7):H01L21/44 主分类号 H01L21/44
代理机构 代理人
主权项
地址