| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a computing device that can efficiently obtain coded binary expressions while keeping the scale of a circuit from increasing. <P>SOLUTION: Multiplier data are inputted to a delaying process part 11 in order from the lowest bit and are K2, K1, and K0. During a period from when K2, K1 and K0 match a starting pattern until they match an ending pattern, a flip-flop 151 is set and a window is opened. While the window is open, a reverse value of K1 is outputted from an EX-OR circuit 162. In the meantime, when K2, K1, and K0 match a negative-code pattern, the output of an AND circuit 171 starts up and the output of an OR circuit 172 becomes 1. An output from the EX-OR circuit 162 gives a weight when the multiplier data are converted into coded binary expressions. The output from the OR circuit 172 gives a code when the multiplier data are converted into the coded binary expressions. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
