Error correcting code encoder supporting multiple code rates and throughput speeds for data storage systems

摘要

Embodiments of ECC encoders supporting multiple code rates and throughput speeds for data storage systems are disclosed. In one embodiment, an encoder can provide for flexible and scalable encoding, particularly when quasi-cyclic low-density parity-check code (QC-LDPC) encoding is used. The encoder can be scaled in size based on, for example, the desired encoding throughput and/or computational cycle duration. The encoder can thus be used to support multiple code rates and throughput speeds. Accordingly, encoding speed and efficiency and system performance is improved.

主权项

1. A data storage system, comprising:
a controller configured to select one or more segment sizes from a plurality of predetermined segment sizes for encoding operations on user data received from a host system, wherein the controller comprises a plurality of encoding modules, at least one of the encoding modules comprising an input register and being configured to receive and operate on a respective data segment of the user data to generate a plurality of subunits of encoded data based on the respective data segment of the user data and respective portions of a generator matrix loaded by the encoding module, wherein a first portion and a second portion of the respective portions each have a size corresponding to one of the selected one or more segment sizes, the size of the first portion being different than the size of the second portion, and wherein the size of the first portion and second portion are based on a different multiplication of a same submatrix size, and wherein a first subunit of the plurality of subunits is a different size than a second subunit of the plurality of subunits.