发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS INSPECTION METHOD
摘要 <P>PROBLEM TO BE SOLVED: To test data reception when a transmitter and a receiver have a frequency difference by using a loop back test of the same chips using PLL in common. <P>SOLUTION: A negative-feedback loop has a phase comparator 11, a serial-parallel converter 12, a digital filter 13, a control circuit 14, and a phase divider 15. A signal for shifting forcibly a phase to the negative-feedback loop is input from a signal output circuit 17, and counters 18a-18c measure each number of pulses, and a signal processing circuit 16 compares the numbers of pulses, to thereby determine existence of ability for absorbing the phase shift brought by the signal. <P>COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005257376(A) 申请公布日期 2005.09.22
申请号 JP20040067206 申请日期 2004.03.10
申请人 TOSHIBA CORP 发明人 SHIZUKI YASUSHI
分类号 G01R31/28;G01R31/317;H01L21/822;H01L27/04;H03K5/26;H04B1/10;H04L7/033 主分类号 G01R31/28
代理机构 代理人
主权项
地址