| 摘要 |
<P>PROBLEM TO BE SOLVED: To suppress fluctuation of power source voltage when a driven device gets into an active state from a sleep state. <P>SOLUTION: A pseudo load generation part 104 is constituted of a resistor and a switch and provides a pseudo load to an output power source of a DC/DC converter 101. A load control part 105 uses a clock from an OSC 102 as an operation clock and a sleep signal 5 expressing an operating state (sleep/active) of an ASIC 2 is connected to it. Then, the load control part 105 performs control for increasing the pseudo loads to the pseudo load generation part 104 in steps when transition of the ASIC 2 to the active state is detected by the sleep signal 5. The switch 103 functions as a means for forcibly separating the pseudo load generation part 104 from the output power source of the DC/DC converter 101 when a system clock gate signal 4 indicates that the ASIC 2 has actually got into the active state, namely, at a high level. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
