发明名称 Dynamically activated memory controller data termination
摘要 A method is described that involves, for a first read of information from a memory, activating termination loads on a memory controller's side of a data bus between a memory controller and a memory. The method also involves, for a write of information into the memory, deactivating the termination loads. The method also involves, for a second read of information from the memory, activating the termination loads.
申请公布号 US7009894(B2) 申请公布日期 2006.03.07
申请号 US20040784047 申请日期 2004.02.19
申请人 INTEL CORPORATION 发明人 MUKKER ANOOP;BOGIN ZOHAR;FREKER DAVE;DOUR NAVNEET
分类号 G11C7/00;G11C7/10 主分类号 G11C7/00
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