| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device in which high speed read operation can be performed with low power consumption. <P>SOLUTION: A read-out circuit is provided with a pre-charge circuit, a discharge circuit, and a sense amplifier. The pre-charge circuit 73 is provided with a first MOS transistor Q3 of a first conduction type in which a gate is connected to a bit line, a second MOS transistor Q4 of a second conduction type in which a gate is connected to a bit line, one end of a current path is connected to one end of a current path of the first MOS transistor, a third MOS transistor Q5 of the first conduction type in which one end of a current path is connected to the other end of the current path of the first MOS transistor, the other end of the current path is connected to the current path, and a pre-charge signal /PRE is supplied to the gate, and a fourth MOS transistor Q2 in which a gate is connected to a connection point of current paths of the first and the second MOS transistors, and a charge level of the bit line is controlled. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
