Structure of multi-mode supported and configurable six-input LUT, and FPGA device

摘要

A structure of a multi-mode supported and configurable six-input look-up table (LUT), and a field-programmable gate array (FPGA) device. The six-input LUT has six signal input ends and two signal output ends. The six-input LUT includes: a first five-input LUT, a second five-input LUT, a first multiplexer, and a second multiplexer. The first five-input LUT outputs a first output signal according to five data signals input by five signal input ends of the six-input LUT, where the first output signal is output by a first signal output end of the six-input LUT; the second five-input LUT outputs a second output signal according to the five data signals input by the five signal input ends of the six-input LUT; and the first multiplexer outputs a control signal according to a set configuration mode, to control the second multiplexer to output the first output signal or the second output signal.

主权项

1. A structure of a multi-mode supported and configurable six-input look-up table (LUT), wherein the six-input LUT has six signal input ends and two signal output ends; and
the structure of the six-input LUT comprises: a first five-input LUT, a second five-input LUT, a first multiplexer and a second multiplexer, wherein the first five-input LUT receives five data signals input by five signal input ends of the six-input LUT, and outputs a first output signal according to the five data signals, wherein the first output signal is output by a first signal output end of the six-input LUT; the second five-input LUT receives five data signals input by the five signal input ends of the six-input LUT and outputs a second output signal according to the five data signals; and the first multiplexer outputs a control signal according to a set configuration mode, to control the second multiplexer to output the first output signal or the second output signal in a multiplexed manner, wherein the first output signal or the second output signal that is output by the second multiplexer in a multiplexed manner is output by a second signal output end of the six-input LUT.