发明名称 |
IMAGING DEVICE, MODULE, AND ELECTRONIC DEVICE |
摘要 |
An imaging device that has a structure where a transistor is used in common by a plurality of pixels and is capable of imaging with a global shutter system is provided. A transistor that resets the potential of a charge detection portion, a transistor that outputs a signal corresponding to the potential of the charge detection portion, and a transistor that selects a pixel are used in common by the plurality of pixels. A transistor is provided between a power supply line and a photoelectric conversion element. Exposure is performed by turning on the transistor. Imaging data is retained in a charge retention portion by turning off the transistor. |
申请公布号 |
US2017104025(A1) |
申请公布日期 |
2017.04.13 |
申请号 |
US201615279735 |
申请日期 |
2016.09.29 |
申请人 |
Semiconductor Energy Laboratory Co., Ltd. |
发明人 |
KUSUMOTO Naoto |
分类号 |
H01L27/146;H04N5/232;H04N5/225 |
主分类号 |
H01L27/146 |
代理机构 |
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代理人 |
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主权项 |
1. An imaging device comprising:
a first transistor including a first oxide semiconductor in a region where a channel is formed; a second transistor including a second oxide semiconductor in a region where a channel is formed; a third transistor including a third oxide semiconductor in a region where a channel is formed; a fourth transistor; a fifth transistor; a first capacitor; a second capacitor, and a photoelectric conversion element, one electrode of the photoelectric conversion element being electrically connected to one of a source and a drain of the first transistor and one electrode of the first capacitor, and the other electrode of the photoelectric conversion element is electrically connected to one of a source and a drain of the second transistor; wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the third transistor, one electrode of the second capacitor, and a gate of the fourth transistor, and wherein one of a source and a drain of the fourth transistor is electrically connected to one of a source and a drain of the fifth transistor. |
地址 |
Atsugi-shi JP |