发明名称 |
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME |
摘要 |
A semiconductor structure with a stop layer for planarization process therein and a method for forming the same is disclosed. The method includes the steps of: forming a trench in a substrate and between active areas; filling the trench with isolation layer; doping the isolation layer with an element to form a doped isolation region; annealing the doped isolation region; and planarizing the annealed and doped isolation region and measuring a planarization depth thereof. The coefficients of thermal expansion (CTEs) of the stop layer, the dielectric layer, and the active area are different. |
申请公布号 |
US2017110379(A1) |
申请公布日期 |
2017.04.20 |
申请号 |
US201615082399 |
申请日期 |
2016.03.28 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
LIN Jia-Ming;LIN Wei-Ken;JANGJIAN Shiu-Ko;LIN Chun-Che |
分类号 |
H01L21/66;H01L21/762;H01L21/3115;H01L29/78 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
HSINCHU TW |